SystDigit-Projet.git - Projet de Système Digital

	Commit message (Collapse)	Author	Age	Files	Lines
*	Merge branch 'jonathan' ; add unit tests.	Alex AUVOLAT	2014-01-10	1	-3/+5
\| \| \| \| \|	Conflicts: cpu/alu.ml
*	Document	Alex AUVOLAT	2014-01-08	1	-4/+8
\|
*	Document ; add hlt instruction ; make monitor faster.	Alex AUVOLAT	2014-01-07	1	-72/+55
\|
*	Document.	Alex AUVOLAT	2014-01-07	1	-1/+3
\|
*	CPU all implemented except missing ALU operations.	Alex AUVOLAT	2014-01-03	1	-2/+2
\|
*	Added simulator monitor tool.	Alex AUVOLAT	2014-01-03	1	-1/+2
\|
*	CPU runs a simple program that increments A and loops (all other ↵	Alex AUVOLAT	2014-01-02	1	-2/+2
\| \| \| \|	instructions unimplemented)
*	Started CPU implementation.	Alex AUVOLAT	2014-01-02	1	-21/+33
\|
*	Ajout support pour les cycles.	Alex AUVOLAT	2014-01-02	1	-12/+29
\|
*	Rajout de 'nop'	Alex AUVOLAT	2014-01-01	1	-12/+14
\|
*	Détails	Alex AUVOLAT	2013-12-19	1	-10/+32
\|
*	Suggestion de plan pour un micro-RISC 16 bit moisi (mais rigolo).	Alex AUVOLAT	2013-12-19	1	-0/+211