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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-03 19:05:10 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-03 19:05:10 +0100 |
commit | 1ff268ab13dd299c4cdc1e379df5397bd6a394e3 (patch) | |
tree | 014db93062f26cdfe2d2639fd833afd554e94a66 /plan_micro.tm | |
parent | c46fe12e47c405fbb03f0c93121402d873bc470e (diff) | |
download | SystDigit-Projet-1ff268ab13dd299c4cdc1e379df5397bd6a394e3.tar.gz SystDigit-Projet-1ff268ab13dd299c4cdc1e379df5397bd6a394e3.zip |
Added simulator monitor tool.
Diffstat (limited to 'plan_micro.tm')
-rw-r--r-- | plan_micro.tm | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/plan_micro.tm b/plan_micro.tm index 6b4e436..4431f85 100644 --- a/plan_micro.tm +++ b/plan_micro.tm @@ -138,7 +138,8 @@ signé>>|<row|<cell|>|<cell|>|<cell|3>|<cell|jleru>|<cell|if <math|R<rsub|A>\<leqslant\>R<rsub|B>> then <math|PC\<leftarrow\>R<rsub|>>>|<cell|non - signé>>|<row|<cell|01100>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01101>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01110>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01111>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|10000>|<cell|K>|<cell|>|<cell|lw>|<cell|<math|R\<leftarrow\>mem<around*|(|R<rprime|'>+d|)>> + signé>>|<row|<cell|01100>|<cell|J>|<cell|>|<cell|lra>|<cell|<math|E\<leftarrow\>PC+d>>|<cell|<math|d> + signé>>|<row|<cell|01101>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01110>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01111>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|10000>|<cell|K>|<cell|>|<cell|lw>|<cell|<math|R\<leftarrow\>mem<around*|(|R<rprime|'>+d|)>> (16 bits)>|<cell|>>|<row|<cell|10001>|<cell|K>|<cell|>|<cell|sw>|<cell|<math|mem<around*|(|R<rprime|'>+d|)>\<leftarrow\>R> (16 bits)>|<cell|>>|<row|<cell|10010>|<cell|K>|<cell|>|<cell|lb>|<cell|<math|R<rsub|lo>\<leftarrow\>mem<around*|(|R<rprime|'>+d|)> ; R<rsub|hi>\<leftarrow\>0> (8 bits)>|<cell|>>|<row|<cell|10011>|<cell|K>|<cell|>|<cell|sb>|<cell|<math|mem<around*|(|R<rprime|'>+d|)>\<leftarrow\>R<rsub|lo>> |