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| author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-02 22:47:05 +0100 |
|---|---|---|
| committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-02 22:47:05 +0100 |
| commit | b93b112a57fec10ac9c78058749be1ee27b13d4a (patch) | |
| tree | e015c786064d133c9bd42833a8e4485269fe642b /plan_micro.tm | |
| parent | 85bc61cb7fa8f4b9af78064cb65fbad49a109d5f (diff) | |
| download | SystDigit-Projet-b93b112a57fec10ac9c78058749be1ee27b13d4a.tar.gz SystDigit-Projet-b93b112a57fec10ac9c78058749be1ee27b13d4a.zip | |
CPU runs a simple program that increments A and loops (all other instructions unimplemented)
Diffstat (limited to 'plan_micro.tm')
| -rw-r--r-- | plan_micro.tm | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/plan_micro.tm b/plan_micro.tm index 715b87c..6b4e436 100644 --- a/plan_micro.tm +++ b/plan_micro.tm @@ -140,8 +140,8 @@ <math|PC\<leftarrow\>R<rsub|>>>|<cell|non signé>>|<row|<cell|01100>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01101>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01110>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|01111>|<cell|>|<cell|>|<cell|<em|nop>>|<cell|>|<cell|>>|<row|<cell|10000>|<cell|K>|<cell|>|<cell|lw>|<cell|<math|R\<leftarrow\>mem<around*|(|R<rprime|'>+d|)>> (16 bits)>|<cell|>>|<row|<cell|10001>|<cell|K>|<cell|>|<cell|sw>|<cell|<math|mem<around*|(|R<rprime|'>+d|)>\<leftarrow\>R> - (16 bits)>|<cell|>>|<row|<cell|10010>|<cell|K>|<cell|>|<cell|lb>|<cell|<math|R\<leftarrow\>mem<around*|(|R<rprime|'>+d|)>> - (8 bits)>|<cell|>>|<row|<cell|10011>|<cell|K>|<cell|>|<cell|sb>|<cell|<math|mem<around*|(|R<rprime|'>+d|)>\<leftarrow\>R> + (16 bits)>|<cell|>>|<row|<cell|10010>|<cell|K>|<cell|>|<cell|lb>|<cell|<math|R<rsub|lo>\<leftarrow\>mem<around*|(|R<rprime|'>+d|)> + ; R<rsub|hi>\<leftarrow\>0> (8 bits)>|<cell|>>|<row|<cell|10011>|<cell|K>|<cell|>|<cell|sb>|<cell|<math|mem<around*|(|R<rprime|'>+d|)>\<leftarrow\>R<rsub|lo>> (8 bits)>|<cell|>>|<row|<cell|10100>|<cell|R>|<cell|*>|<cell|lwr>|<cell|<math|R\<leftarrow\>mem<around*|(|R<rsub|A>+R<rsub|B>|)>> (16 bits)>|<cell|>>|<row|<cell|10101>|<cell|R>|<cell|*>|<cell|swr>|<cell|<math|mem<around*|(|R<rsub|A>+R<rsub|B>|)>\<leftarrow\>R> (16 bits)>|<cell|>>|<row|<cell|10110>|<cell|R>|<cell|*>|<cell|lbr>|<cell|<math|R\<leftarrow\>mem<around*|(|R<rsub|A>+R<rsub|B>|)>> |