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* Implement lw/sw/lwr/swr ; optimize simplification pass order ; add comments i...Alex AUVOLAT2014-01-031-1/+15
* Started CPU implementation.Alex AUVOLAT2014-01-021-4/+6
* Tabs to spaces ; deleted Caml simulator (useless anyways)Alex AUVOLAT2013-12-171-152/+152
* RAM gives result immediately..Alex AUVOLAT2013-11-191-3/+7
* Added ROM support, coded a 24/60/60 watch with output for 7-bit LCD displayAlex AUVOLAT2013-11-111-3/+44
* Minor style changes.Alex AUVOLAT2013-11-091-1/+2
* [WIP] Change dumb netlist format in scheduler and simulator.Alex AUVOLAT2013-11-081-57/+43
* Added netlist simplification passes (not yet quite complete !)Alex AUVOLAT2013-11-051-3/+3
* Reorganized folders.Alex AUVOLAT2013-11-051-0/+4
* C simulator quite completed.Alex AUVOLAT2013-11-041-6/+33
* Added stub C simulator (defined dumb-down syntax for netlists).Alex AUVOLAT2013-11-041-0/+104