SystDigit-Projet.git - Projet de Système Digital

	Commit message (Expand)	Author	Age	Files	Lines
*	Changes...	Alex AUVOLAT	2014-01-14	1	-1/+4
*	there's a strange bug in the division	Jonathan	2014-01-12	1	-5/+5
*	division with a strange bug in the remainder	Jonathan	2014-01-11	1	-32/+19
*	implemented a buggy division algorithm	Jonathan	2014-01-11	1	-21/+104
*	Unsigned multiplication works (uses as many cycles as necessary) ; unit tests.	Alex AUVOLAT	2014-01-10	1	-21/+33
*	Merge branch 'jonathan' ; add unit tests.	Alex AUVOLAT	2014-01-10	1	-8/+90
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\| *	restored the functionnal version of mul	Jonathan	2014-01-09	1	-17/+2
\| *	Implémentation de la multiplication ; correction d'un bug dans netlist_gen ;...	Jonathan	2014-01-09	1	-3/+105
* \|	Add support for ALU operations on several cycles.	Alex AUVOLAT	2014-01-10	1	-17/+23
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*	Document.	Alex AUVOLAT	2014-01-07	1	-1/+1
*	CPU all implemented except missing ALU operations.	Alex AUVOLAT	2014-01-03	1	-7/+110
*	Added simulator monitor tool.	Alex AUVOLAT	2014-01-03	1	-10/+17
*	Implement jr/jalr/jer/jner/jltr/jler/jltru/jleru ; add simplification to sched.	Alex AUVOLAT	2014-01-02	1	-12/+56
*	Started CPU implementation.	Alex AUVOLAT	2014-01-02	1	-0/+17
*	Premiers morceaux de CPU - enfin non, rien du tout...	Alex AUVOLAT	2013-12-19	1	-0/+16