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authorAlex AUVOLAT <alex.auvolat@ens.fr>2013-12-19 18:31:04 +0100
committerAlex AUVOLAT <alex.auvolat@ens.fr>2013-12-19 18:31:04 +0100
commit8c63ae039b15a5de575248ed2399e8ab3c451e16 (patch)
tree90ba1285e3d2438d84ba00328714e52dd54f9483 /cpu/alu.ml
parent19d450830f848c9d88d61c381c3bafde560f78bb (diff)
downloadSystDigit-Projet-8c63ae039b15a5de575248ed2399e8ab3c451e16.tar.gz
SystDigit-Projet-8c63ae039b15a5de575248ed2399e8ab3c451e16.zip
Premiers morceaux de CPU - enfin non, rien du tout...
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+open Netlist_gen
+
+let fulladder a b c =
+ let s = a ^^ b ^^ c in
+ let r = (a ^& b) ^| ((a ^^ b) ^& c) in
+ s, r
+
+let rec nadder n a b c_in =
+ if n = 1 then fulladder a b c_in
+ else
+ let s_n, c_n1 = fulladder (a ** 0) (b ** 0) c_in in
+ let s_n1, c_out = nadder (n-1) (a % (1, n-1)) (b % (1, n-1)) c_n1 in
+ s_n ++ s_n1, c_out
+
+
+