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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-11-05 13:47:12 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-11-05 13:47:12 +0100 |
commit | 07b7563e0748b1aff6f4d28b0172095b2fdcdfcc (patch) | |
tree | a5e390cfad822d87e6874f4e719edda445a32585 /csim | |
parent | 94e88e887cf2ee4c6b445924d26e134a90bcbd50 (diff) | |
download | SystDigit-Projet-07b7563e0748b1aff6f4d28b0172095b2fdcdfcc.tar.gz SystDigit-Projet-07b7563e0748b1aff6f4d28b0172095b2fdcdfcc.zip |
Added netlist simplification passes (not yet quite complete !)
Diffstat (limited to 'csim')
-rw-r--r-- | csim/load.c | 6 | ||||
-rw-r--r-- | csim/sim.c | 16 |
2 files changed, 14 insertions, 8 deletions
diff --git a/csim/load.c b/csim/load.c index a7e6cac..7971a71 100644 --- a/csim/load.c +++ b/csim/load.c @@ -35,10 +35,10 @@ t_value read_bool(FILE *stream, t_value *mask) { void read_arg(FILE *stream, t_arg *dest) { dest->mask = 0; - if (fscanf(stream, "$") > 0) { - dest->Val = read_bool(stream, &dest->mask); + if (fscanf(stream, "$%d ", &(dest->SrcVar))) { + // ok, value is read } else { - fscanf(stream, "%d ", &(dest->SrcVar)); + dest->Val = read_bool(stream, &dest->mask); } } @@ -55,7 +55,8 @@ t_machine *init_machine (t_program *p) { void read_inputs(t_machine *m, FILE *stream) { /* FORMAT : For each input in the list, *in the order specified*, - the binary value for that variable. + either '/' followed by the decimal value + or the binary value */ int i; t_id var; @@ -66,7 +67,12 @@ void read_inputs(t_machine *m, FILE *stream) { for (i = 0; i < p->n_inputs; i++) { var = p->inputs[i]; fscanf(stream, " "); - m->var_values[var] = read_bool(stream, NULL); + if (fscanf(stream, "/%lu", &(m->var_values[var]))) { + // ok, value is read + } else { + m->var_values[var] = read_bool(stream, NULL); + } + m->var_values[var] &= p->vars[var].mask; } } @@ -179,7 +185,7 @@ void machine_step(t_machine *m) { if (e != 0) { a = get_var(m, p->eqs[i].Ram.write_addr); d = get_var(m, p->eqs[i].Ram.data); - printf("Write ram %lx = %lx\n", a, d); + if (DEBUG) fprintf(stderr, "Write ram %lx = %lx\n", a, d); m->mem_data[i].RamData[a] = d; } } @@ -189,7 +195,7 @@ void machine_step(t_machine *m) { void write_outputs(t_machine *m, FILE *stream) { /* FORMAT : For each output value, a line in the form - var_name binary_value + var_name binary_value decimal_value */ int i; t_id var; @@ -205,7 +211,7 @@ void write_outputs(t_machine *m, FILE *stream) { v >>= 1; mask >>= 1; } - fprintf(stream, "\n"); + fprintf(stream, "\t%ld\n", m->var_values[var]); } fprintf(stream, "\n"); } |