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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-10 13:57:45 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-10 13:57:45 +0100 |
commit | 40f46cd1ce93d7f8045dda4e0af91670cd681d57 (patch) | |
tree | d4d3b17b382940d9e9425d180d68c17e071a03b9 /cpu/cpu.ml | |
parent | 36a354fc8b914f6b96cba19a67c8f6ce712ac656 (diff) | |
download | SystDigit-Projet-40f46cd1ce93d7f8045dda4e0af91670cd681d57.tar.gz SystDigit-Projet-40f46cd1ce93d7f8045dda4e0af91670cd681d57.zip |
Add support for ALU operations on several cycles.
Diffstat (limited to 'cpu/cpu.ml')
-rw-r--r-- | cpu/cpu.ml | 18 |
1 files changed, 9 insertions, 9 deletions
@@ -157,15 +157,15 @@ let rl, rh, i, ex, exf, pc = let f0 = i_i ** 0 in let f1 = i_i ** 1 in let double_instr_alu = instr_alu ^& (not f1) ^& (i_f ** 1) ^& (ne_n 3 i_r (const "101")) in - let instr_alu = exec ^& instr_alu in - let instr_alu_2 = reg 1 (exec ^& double_instr_alu) in - - let alu_d1, alu_d2 = alu f1 f0 i_f v_ra v_rb in - let wr = mux instr_alu wr i_r in - let rwd = mux instr_alu rwd alu_d1 in - let wr = mux instr_alu_2 wr (const "101") in - let rwd = mux instr_alu_2 rwd alu_d2 in - let exec_finished = mux double_instr_alu exec_finished instr_alu_2 in + + let alu_d1, alu_d2, instr_alu_finished = alu f1 f0 i_f v_ra v_rb (exec ^& instr_alu) in + let instr_alu_store_2 = reg 1 (instr_alu_finished ^& double_instr_alu) in + let wr = mux instr_alu_finished wr i_r in + let rwd = mux instr_alu_finished rwd alu_d1 in + let wr = mux instr_alu_store_2 wr (const "101") in + let rwd = mux instr_alu_store_2 rwd alu_d2 in + let exec_finished = mux instr_alu exec_finished + (mux double_instr_alu instr_alu_finished instr_alu_store_2) in (* instruction : se/sne/slt/slte/sleu/sleu *) |