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authorAlex AUVOLAT <alex.auvolat@ens.fr>2014-01-09 16:58:57 +0100
committerAlex AUVOLAT <alex.auvolat@ens.fr>2014-01-09 16:58:57 +0100
commit36a354fc8b914f6b96cba19a67c8f6ce712ac656 (patch)
treeffb35f531a1230143f87af4ff5ac870e65164a7a /cpu/cpu.ml
parent8d87eacbcb26e7abc429d7824e90c617f172045e (diff)
downloadSystDigit-Projet-36a354fc8b914f6b96cba19a67c8f6ce712ac656.tar.gz
SystDigit-Projet-36a354fc8b914f6b96cba19a67c8f6ce712ac656.zip
Basic operating system...
Diffstat (limited to 'cpu/cpu.ml')
-rw-r--r--cpu/cpu.ml1
1 files changed, 1 insertions, 0 deletions
diff --git a/cpu/cpu.ml b/cpu/cpu.ml
index 1d1eea8..3f9dd74 100644
--- a/cpu/cpu.ml
+++ b/cpu/cpu.ml
@@ -56,6 +56,7 @@ let cpu_ram ra we wa d =
let iser = nonnull 8 ser_in in
let ser = mux iser ser ser_in in
let ser_busy = nonnull 8 ser in
+ let ser_busy = mux read_ser ser_busy (const "0") in
let read_data =
save_ser_in_busy ser_busy ^.
save_next_ser (mux read_ser ser (zeroes 8)) ^.