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author | Alexis211 <alexis211@gmail.com> | 2009-11-29 16:22:01 +0100 |
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committer | Alexis211 <alexis211@gmail.com> | 2009-11-29 16:22:01 +0100 |
commit | 41874c455c755f00ca73c2e2ee5ab8c4b0dbe61e (patch) | |
tree | 95986807bde312286c28297059873a6c66b72566 /Source/Kernel/Devices | |
parent | a913d4c2cb4daf10c0eac4d548fccb26b2a9f099 (diff) | |
download | Melon-41874c455c755f00ca73c2e2ee5ab8c4b0dbe61e.tar.gz Melon-41874c455c755f00ca73c2e2ee5ab8c4b0dbe61e.zip |
Reading from HDD is now possible !
Diffstat (limited to 'Source/Kernel/Devices')
-rw-r--r-- | Source/Kernel/Devices/ATA/ATAController.class.cpp | 53 | ||||
-rw-r--r-- | Source/Kernel/Devices/ATA/ATAController.class.h | 47 | ||||
-rw-r--r-- | Source/Kernel/Devices/ATA/ATADrive.class.cpp | 71 | ||||
-rw-r--r-- | Source/Kernel/Devices/ATA/ATADrive.class.h | 30 |
4 files changed, 201 insertions, 0 deletions
diff --git a/Source/Kernel/Devices/ATA/ATAController.class.cpp b/Source/Kernel/Devices/ATA/ATAController.class.cpp new file mode 100644 index 0000000..69a18a4 --- /dev/null +++ b/Source/Kernel/Devices/ATA/ATAController.class.cpp @@ -0,0 +1,53 @@ +#include "ATADrive.class.h" + +#include <DeviceManager/Dev.ns.h> +#include <VFS/Part.ns.h> + +String ATAController::getClass() { + return "controller.ata"; +} + +String ATAController::getName() { + return String("ATA controller #") + String::number(m_number); +} + +void ATAController::detect() { + ATAController *c[2]; + c[0] = new ATAController(ATA_BUS1_BASE, 0); + c[1] = new ATAController(ATA_BUS2_BASE, 1); + Dev::registerDevice(c[0]); Dev::registerDevice(c[1]); + for (u32int d = 0; d < 2; d++) { + for (u32int r = 0; r < 2; r++) { + ATADrive* drv = c[d]->m_drives[r]; + if (drv != 0) { + Dev::registerDevice(drv); + Part::registerDevice(drv); + } + } + } +} + +ATAController::ATAController(u32int base, u8int number) { + m_base = base; m_number = number; + m_drives[0] = NULL; m_drives[1] = NULL; + identify(false); //Identify master device + identify(true); //Identify slave device +} + +void ATAController::identify(bool slave) { + if (m_drives[(slave ? 1 : 0)] != NULL) return; + writeByte(ATA_PORT_DRIVE_SELECT, (slave ? 0xB0 : 0xA0)); + writeByte(ATA_PORT_COMMAND, ATA_CMD_IDENTIFY); + u8int ret = readByte(ATA_PORT_COMMAND); + if (ret == 0) return; //Drive does not exist + while ((ret & 0x88) != 0x08 and (ret & 1) != 1) { + ret = readByte(ATA_PORT_COMMAND); + } + if ((ret & 1) == 1) return; //Error while IDENTIFY + u16int data[256]; + for (u32int i = 0; i < 256; i++) data[i] = readWord(ATA_PORT_DATA); + u32int blocks = (data[61] << 16) | data[60]; + if (blocks != 0) { //Drive supports LBA28 + m_drives[(slave ? 1 : 0)] = new ATADrive(this, slave, blocks, data); + } +} diff --git a/Source/Kernel/Devices/ATA/ATAController.class.h b/Source/Kernel/Devices/ATA/ATAController.class.h new file mode 100644 index 0000000..a12b835 --- /dev/null +++ b/Source/Kernel/Devices/ATA/ATAController.class.h @@ -0,0 +1,47 @@ +#ifndef DEF_ATACONTROLLER_CLASS_H +#define DEF_ATACONTROLLER_CLASS_H + +#include <Devices/Device.proto.h> + +#define ATA_BUS1_BASE 0x1F0 +#define ATA_BUS2_BASE 0x170 + +#define ATA_PORT_DATA 0 +#define ATA_PORT_FEATURES_ERROR 1 +#define ATA_PORT_SECT_COUNT 2 +#define ATA_PORT_PARTIAL1 3 +#define ATA_PORT_PARTIAL2 4 +#define ATA_PORT_PARTIAL3 5 +#define ATA_PORT_DRIVE_SELECT 6 +#define ATA_PORT_COMMAND 7 + +#define ATA_CMD_IDENTIFY 0xEC +#define ATA_CMD_READ 0x20 +#define ATA_CMD_WRITE 0x30 + +class ATADrive; + +class ATAController : public Device { + friend class ATADrive; + private: + ATAController(u32int base, u8int number); + + u32int m_base; + u8int m_number; + + ATADrive* m_drives[2]; + + void writeWord(u16int port, u16int word) { Sys::outw(m_base + port, word); } + void writeByte(u16int port, u8int byte) { Sys::outb(m_base + port, byte); } + u8int readByte(u16int port) { return Sys::inb(m_base + port); } + u16int readWord(u16int port) { return Sys::inw(m_base + port); } + + void identify(bool slave); //Identifies a drive and adds it to m_drives + + public: + static void detect(); + String getClass(); + String getName(); +}; + +#endif diff --git a/Source/Kernel/Devices/ATA/ATADrive.class.cpp b/Source/Kernel/Devices/ATA/ATADrive.class.cpp new file mode 100644 index 0000000..d9cc4a7 --- /dev/null +++ b/Source/Kernel/Devices/ATA/ATADrive.class.cpp @@ -0,0 +1,71 @@ +#include "ATADrive.class.h" + +String ATADrive::getClass() { + return "block.ata"; +} + +String ATADrive::getName() { + return String("ATA drive ") += String::number(m_ctrlr->m_number) += String(m_isSlave ? ".slave " : ".master ") + += String::number(m_blockCount / (1024 * 1024 / blockSize())) += "MB"; +} + +ATADrive::ATADrive(ATAController* ctrlr, bool isSlave, u32int blockCount, u16int* identifyData) { + m_ctrlr = ctrlr; + m_isSlave = isSlave; + m_blockCount = blockCount; + for (u32int i = 0; i < 256; i++) m_identifyData[i] = identifyData[i]; +} + +bool ATADrive::readOnly() { + return true; +} + +u64int ATADrive::blocks() { + return m_blockCount; +} + +void ATADrive::cmdCommon(u32int numblock, u32int count) { + m_ctrlr->writeByte(ATA_PORT_FEATURES_ERROR, 0); + m_ctrlr->writeByte(ATA_PORT_SECT_COUNT, count); + m_ctrlr->writeByte(ATA_PORT_PARTIAL1, numblock); + m_ctrlr->writeByte(ATA_PORT_PARTIAL2, numblock >> 8); + m_ctrlr->writeByte(ATA_PORT_PARTIAL3, numblock >> 16); + + m_ctrlr->writeByte(ATA_PORT_DRIVE_SELECT, 0xE0 | (m_isSlave ? 0x10 : 0) | ((numblock >> 24) & 0x0F)); +} + +bool ATADrive::readBlocks(u64int start, u32int count, u8int* data) { + if (start + count >= m_blockCount) return false; + + cmdCommon(start, count); + m_ctrlr->writeByte(ATA_PORT_COMMAND, ATA_CMD_READ); + + while (!(m_ctrlr->readByte(ATA_PORT_COMMAND) & 0x08)); //Wait for the drive to be ready + + for (u32int idx = 0; idx < count * 256; idx++) { + u16int tmpword = m_ctrlr->readWord(ATA_PORT_DATA); + data[idx * 2] = (u8int)tmpword; + data[idx * 2 + 1] = (u8int)(tmpword >> 8); + } + return true; +} + +bool ATADrive::writeBlocks(u64int start, u32int count, u8int* data) { + if (start + count >= m_blockCount) return false; + if (readOnly()) return false; + + cmdCommon(start, count); + m_ctrlr->writeByte(ATA_PORT_COMMAND, ATA_CMD_WRITE); + + while (!(m_ctrlr->readByte(ATA_PORT_COMMAND) & 0x08)); //Wait for the drive to be ready + + for (u32int idx = 0; idx < count * 256; idx++) { + u16int tmpword = (data[idx * 2]) | (data[idx * 2 + 1] << 8); + m_ctrlr->writeByte(ATA_PORT_DATA, tmpword); + } + return true; +} + +u32int ATADrive::blockSize() { + return 512; +} diff --git a/Source/Kernel/Devices/ATA/ATADrive.class.h b/Source/Kernel/Devices/ATA/ATADrive.class.h new file mode 100644 index 0000000..b6087bf --- /dev/null +++ b/Source/Kernel/Devices/ATA/ATADrive.class.h @@ -0,0 +1,30 @@ +#ifndef DEF_ATADRIVE_CLASS_H +#define DEF_ATADRIVE_CLASS_H + +#include "ATAController.class.h" +#include <Devices/BlockDevice.proto.h> + +class ATADrive : public BlockDevice { + friend class ATAController; + private: + ATADrive(ATAController* ctrlr, bool isSlave, u32int blockCount, u16int* identifyData); + + ATAController* m_ctrlr; + bool m_isSlave; + u32int m_blockCount; + u16int m_identifyData[256]; + + void cmdCommon(u32int numblock, u32int count); + + public: + String getClass(); + String getName(); + + bool readOnly(); + u64int blocks(); + bool readBlocks(u64int start, u32int count, u8int* data); + bool writeBlocks(u64int start, u32int count, u8int* data); + u32int blockSize(); +}; + +#endif |