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authorAlex Auvolat <alex.auvolat@ansys.com>2014-06-19 17:53:33 +0200
committerAlex Auvolat <alex.auvolat@ansys.com>2014-06-19 17:53:33 +0200
commit3c3b96e877dcb121d17da282dc4ca0caadda72b2 (patch)
treee6cd5c3f6ca686c0d106f89c308e9feb0f67d8b2 /libs
parentf4200a0aa90e2641ce1b0b1c54d00d9d4dd3b73e (diff)
downloadscade-analyzer-3c3b96e877dcb121d17da282dc4ca0caadda72b2.tar.gz
scade-analyzer-3c3b96e877dcb121d17da282dc4ca0caadda72b2.zip
Very buggy disjunction domain !
Diffstat (limited to 'libs')
-rw-r--r--libs/util.ml6
1 files changed, 6 insertions, 0 deletions
diff --git a/libs/util.ml b/libs/util.ml
index 6931ed9..01b0c5c 100644
--- a/libs/util.ml
+++ b/libs/util.ml
@@ -25,6 +25,8 @@ let loc_error l f x =
| NoLocError e -> raise (LocError([l], e))
| LocError(q, e) -> raise (LocError(l::q, e))
+let not_implemented e = error ("Not implemented: " ^ e)
+
(* Varmaps *)
module VarMap = Mapext.Make(String)
@@ -33,6 +35,10 @@ let disjoint_union k a b = match a, b with
| None, Some y -> Some y
| _ -> error ("Duplicate name in disjoint union: " ^ k)
+module SSet = Set.Make(String)
+
+(* Fixpoint *)
+
let rec fix equal f s =
let fs = f s in
if equal fs s