| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Started CPU implementation. | Alex AUVOLAT | 2014-01-02 | 1 | -4/+6 |
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| * | Tabs to spaces ; deleted Caml simulator (useless anyways) | Alex AUVOLAT | 2013-12-17 | 1 | -152/+152 |
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| * | RAM gives result immediately.. | Alex AUVOLAT | 2013-11-19 | 1 | -3/+7 |
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| * | Added ROM support, coded a 24/60/60 watch with output for 7-bit LCD display | Alex AUVOLAT | 2013-11-11 | 1 | -3/+44 |
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| * | Minor style changes. | Alex AUVOLAT | 2013-11-09 | 1 | -1/+2 |
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| * | [WIP] Change dumb netlist format in scheduler and simulator. | Alex AUVOLAT | 2013-11-08 | 1 | -57/+43 |
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| * | Added netlist simplification passes (not yet quite complete !) | Alex AUVOLAT | 2013-11-05 | 1 | -3/+3 |
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| * | Reorganized folders. | Alex AUVOLAT | 2013-11-05 | 1 | -0/+4 |
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| * | C simulator quite completed. | Alex AUVOLAT | 2013-11-04 | 1 | -6/+33 |
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| * | Added stub C simulator (defined dumb-down syntax for netlists). | Alex AUVOLAT | 2013-11-04 | 1 | -0/+104 |
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index : SystDigit-Projet.git | |
| Projet de Système Digital |
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