SystDigit-Projet.git - Projet de Système Digital

	Commit message (Collapse)	Author	Age	Files	Lines
*	Merge branch 'jonathan' ; add unit tests.	Alex AUVOLAT	2014-01-10	1	-8/+90
\|\ \| \| \| \| \| \| \| \|	Conflicts: cpu/alu.ml
\| *	restored the functionnal version of mul	Jonathan	2014-01-09	1	-17/+2
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\| *	Implémentation de la multiplication ; correction d'un bug dans netlist_gen ↵	Jonathan	2014-01-09	1	-3/+105
\| \| \| \| \| \| \| \|	; ajout de la localisation des erreurs dans sched/.
* \|	Add support for ALU operations on several cycles.	Alex AUVOLAT	2014-01-10	1	-17/+23
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*	Document.	Alex AUVOLAT	2014-01-07	1	-1/+1
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*	CPU all implemented except missing ALU operations.	Alex AUVOLAT	2014-01-03	1	-7/+110
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*	Added simulator monitor tool.	Alex AUVOLAT	2014-01-03	1	-10/+17
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*	Implement jr/jalr/jer/jner/jltr/jler/jltru/jleru ; add simplification to sched.	Alex AUVOLAT	2014-01-02	1	-12/+56
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*	Started CPU implementation.	Alex AUVOLAT	2014-01-02	1	-0/+17
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*	Premiers morceaux de CPU - enfin non, rien du tout...	Alex AUVOLAT	2013-12-19	1	-0/+16