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* Merge branch 'emile' into integration-progressiveAlex AUVOLAT2014-01-084-54/+56
|\ | | | | | | | | | | | | | | Conflicts: asm/_tags asm/asmlex.mll asm/asmpars.mly asm/assembler.ml
| * 2e mail EmileAlex AUVOLAT2014-01-085-35/+48
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* | Petites modificationsAlex AUVOLAT2014-01-088-128/+213
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* Premier mail emileAlex AUVOLAT2014-01-084-0/+488
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* DocumentAlex AUVOLAT2014-01-082-4/+8
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* Document ; add hlt instruction ; make monitor faster.Alex AUVOLAT2014-01-074-74/+75
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* Document.Alex AUVOLAT2014-01-076-11/+10
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* Make sw/sb run in one tick less, correct scheduler.Alex AUVOLAT2014-01-063-21/+17
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* Nothingness...Alex AUVOLAT2014-01-042-27/+46
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* Dynamic frequency ajustment.Alex AUVOLAT2014-01-043-21/+42
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* Document programs ; better time support in monitor.Alex AUVOLAT2014-01-0413-39/+186
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* Style corrections.Alex AUVOLAT2014-01-034-17/+17
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* Corrected serial mmioAlex AUVOLAT2014-01-031-1/+1
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* Nothingness, again.Alex AUVOLAT2014-01-032-0/+2
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* Nothing.Alex AUVOLAT2014-01-032-1/+1
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* CPU all implemented except missing ALU operations.Alex AUVOLAT2014-01-037-35/+183
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* Monitor now works correctly.Alex AUVOLAT2014-01-039-24/+189
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* Added simulator monitor tool.Alex AUVOLAT2014-01-0316-38/+414
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* Implement lw/sw/lwr/swr ; optimize simplification pass order ; add comments ↵Alex AUVOLAT2014-01-035-15/+73
| | | | in ROM files
* Implement jr/jalr/jer/jner/jltr/jler/jltru/jleru ; add simplification to sched.Alex AUVOLAT2014-01-023-16/+84
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* CPU runs a simple program that increments A and loops (all other ↵Alex AUVOLAT2014-01-023-18/+22
| | | | instructions unimplemented)
* Started CPU implementation.Alex AUVOLAT2014-01-0216-106/+334
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* Renamed example cpu fileAlex AUVOLAT2014-01-021-0/+0
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* New netlist generation protocolAlex AUVOLAT2014-01-025-3497/+276
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* Memorizing CPU : summs all the entriesAlex AUVOLAT2014-01-021-1/+8
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* Ajout support pour les cycles.Alex AUVOLAT2014-01-025-642/+1939
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* Rajout de 'nop'Alex AUVOLAT2014-01-012-12/+14
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* DétailsAlex AUVOLAT2013-12-192-10/+32
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* Premiers morceaux de CPU - enfin non, rien du tout...Alex AUVOLAT2013-12-197-0/+2325
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* Suggestion de plan pour un micro-RISC 16 bit moisi (mais rigolo).Alex AUVOLAT2013-12-193-4/+215
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* Tabs to spaces ; deleted Caml simulator (useless anyways)Alex AUVOLAT2013-12-1718-1567/+1149
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* RAM gives result immediately..Alex AUVOLAT2013-11-196-42/+48
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* Added optimization pass : delete useless CONCAT's.Alex AUVOLAT2013-11-191-1/+56
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* Added a TODO, changed a few comments.Alex AUVOLAT2013-11-152-1/+4
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* Improvemenet of pow2 (suggested by T.Bourke)Alex AUVOLAT2013-11-122-4/+18
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* Updated README file.Alex AUVOLAT2013-11-121-4/+5
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* Minor changes.Alex AUVOLAT2013-11-122-1/+79
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* (nothing interesting)Alex AUVOLAT2013-11-123-7/+143
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* Corrected a stupid bug.Alex AUVOLAT2013-11-111-1/+1
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* Added ROM support, coded a 24/60/60 watch with output for 7-bit LCD displayAlex AUVOLAT2013-11-119-42/+253
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* Merge branch 'master' of ↵Alex AUVOLAT2013-11-091-6/+6
|\ | | | | | | drakkar.ens.fr:/users/13/info/auvolat/boulot/SystDigit-Projet
| * Corrected a conflict in naming.Alex AUVOLAT2013-11-091-6/+6
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* | Minor style changes.Alex AUVOLAT2013-11-092-3/+5
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* Little change, usefull ? Not really.Alex AUVOLAT2013-11-081-6/+10
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* More optimizations.Alex AUVOLAT2013-11-087-152/+107
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* Minor changes.Alex AUVOLAT2013-11-082-30/+49
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* Simulator fixed.Alex AUVOLAT2013-11-085-8/+9
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* [WIP] Change dumb netlist format in scheduler and simulator.Alex AUVOLAT2013-11-086-184/+398
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* Correction to netlist parser (not taken into account in the caml simulator, ↵Alex AUVOLAT2013-11-073-26/+16
| | | | which is kind of abandonned).
* Started work on second version of dumb netlist format.Alex AUVOLAT2013-11-073-96/+158
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