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| author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-11-04 23:47:56 +0100 |
|---|---|---|
| committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-11-04 23:47:56 +0100 |
| commit | 7950298bf80fd1d1f311e7bd4f75b442df7c679c (patch) | |
| tree | efb935d351a6dd798795641461f63cf17ca9f390 /sched/test/ram.net | |
| parent | 62705818bf8227a9a35fff6879306c1b861e9dfd (diff) | |
| download | SystDigit-Projet-7950298bf80fd1d1f311e7bd4f75b442df7c679c.tar.gz SystDigit-Projet-7950298bf80fd1d1f311e7bd4f75b442df7c679c.zip | |
C simulator quite completed.
Diffstat (limited to 'sched/test/ram.net')
| -rw-r--r-- | sched/test/ram.net | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sched/test/ram.net b/sched/test/ram.net index ee4570a..56f2fc6 100644 --- a/sched/test/ram.net +++ b/sched/test/ram.net @@ -10,23 +10,23 @@ o = RAM 2 4 ra we wa _l_16 _l_16 = CONCAT _l_11_21 _l_14_18 _l_9_23 = SELECT 0 o _l_10_22 = SELECT 0 c -_l_11_21 = AND _l_9_23 _l_10_22 +_l_11_21 = OR _l_9_23 _l_10_22 _l_12_20 = SLICE 1 3 o _l_13_19 = SLICE 1 3 c _l_14_18 = CONCAT _l_11_34 _l_14_31 _l_9_36 = SELECT 0 _l_12_20 _l_10_35 = SELECT 0 _l_13_19 -_l_11_34 = AND _l_9_36 _l_10_35 +_l_11_34 = OR _l_9_36 _l_10_35 _l_12_33 = SLICE 1 2 _l_12_20 _l_13_32 = SLICE 1 2 _l_13_19 _l_14_31 = CONCAT _l_11_47 _l_14_44 _l_9_49 = SELECT 0 _l_12_33 _l_10_48 = SELECT 0 _l_13_32 -_l_11_47 = AND _l_9_49 _l_10_48 +_l_11_47 = OR _l_9_49 _l_10_48 _l_12_46 = SLICE 1 1 _l_12_33 _l_13_45 = SLICE 1 1 _l_13_32 _l_14_44 = _l_11_60 _l_9_62 = SELECT 0 _l_12_46 _l_10_61 = SELECT 0 _l_13_45 -_l_11_60 = AND _l_9_62 _l_10_61 +_l_11_60 = OR _l_9_62 _l_10_61 |