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authorAlex AUVOLAT <alex.auvolat@ens.fr>2013-11-04 22:05:57 +0100
committerAlex AUVOLAT <alex.auvolat@ens.fr>2013-11-04 22:05:57 +0100
commitcebd07b64f1f537c5ecf00ec21ff4b7c4032f0a3 (patch)
tree9d2048313fe3ad4c92865c8f0236bed24e64449b /sched/test/clock_div.mj
parentf253f98136def21b5e50c5922246e2ddfe315442 (diff)
downloadSystDigit-Projet-cebd07b64f1f537c5ecf00ec21ff4b7c4032f0a3.tar.gz
SystDigit-Projet-cebd07b64f1f537c5ecf00ec21ff4b7c4032f0a3.zip
Added stub C simulator (defined dumb-down syntax for netlists).
Diffstat (limited to 'sched/test/clock_div.mj')
-rw-r--r--sched/test/clock_div.mj4
1 files changed, 4 insertions, 0 deletions
diff --git a/sched/test/clock_div.mj b/sched/test/clock_div.mj
new file mode 100644
index 0000000..ad1e919
--- /dev/null
+++ b/sched/test/clock_div.mj
@@ -0,0 +1,4 @@
+main() = (o) where
+ o = reg(c);
+ c = not (reg (o))
+end where \ No newline at end of file