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| author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-19 18:14:16 +0100 |
|---|---|---|
| committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-19 18:14:16 +0100 |
| commit | bde3f17405623f5e1200f84d0bfa16df2adccc6c (patch) | |
| tree | 64f6a96e320f1332775f4f4f094cd36a10324be4 /doc/rapport_final.lytex | |
| parent | 5cca7e5630c3d1125e7f0c459102c944a0593711 (diff) | |
| download | SystDigit-Projet-bde3f17405623f5e1200f84d0bfa16df2adccc6c.tar.gz SystDigit-Projet-bde3f17405623f5e1200f84d0bfa16df2adccc6c.zip | |
Add missing '#'
Diffstat (limited to 'doc/rapport_final.lytex')
| -rw-r--r-- | doc/rapport_final.lytex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/rapport_final.lytex b/doc/rapport_final.lytex index 96ef940..536d0d9 100644 --- a/doc/rapport_final.lytex +++ b/doc/rapport_final.lytex @@ -392,7 +392,7 @@ mapped respectively to the clock counter, the serial output and the serial input Here is an example function that outputs a string on the serial output: \begin{verbatim} - PROCEDURE: ser_out_str +# PROCEDURE: ser_out_str # ROLE: write null-terminated string to serial output # ARGUMENTS: address of string in register A ser_out_str: |