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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-03 12:07:46 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-03 12:07:46 +0100 |
commit | c46fe12e47c405fbb03f0c93121402d873bc470e (patch) | |
tree | bc9cb3f5ffb5f130106e80d2777da41058d81d3a /cpu/netlist_gen.ml | |
parent | f2b28b4124015718dc4b392e00f4aade4eedc11c (diff) | |
download | SystDigit-Projet-c46fe12e47c405fbb03f0c93121402d873bc470e.tar.gz SystDigit-Projet-c46fe12e47c405fbb03f0c93121402d873bc470e.zip |
Implement lw/sw/lwr/swr ; optimize simplification pass order ; add comments in ROM files
Diffstat (limited to 'cpu/netlist_gen.ml')
-rw-r--r-- | cpu/netlist_gen.ml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/netlist_gen.ml b/cpu/netlist_gen.ml index 0c38b6f..1aad452 100644 --- a/cpu/netlist_gen.ml +++ b/cpu/netlist_gen.ml @@ -198,7 +198,7 @@ let program entries outputs = { p_inputs = p.p_inputs; p_eqs = p.p_eqs; p_vars = p.p_vars; - p_outputs = outputs } + p_outputs = List.rev outputs } (* Netlist printer *) |