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authorAlex AUVOLAT <alex.auvolat@ens.fr>2014-01-03 23:11:45 +0100
committerAlex AUVOLAT <alex.auvolat@ens.fr>2014-01-03 23:11:45 +0100
commit39df9f197b987e0a2c564276d5b65a97f1fb2700 (patch)
tree820be10ff513108eebb7be35c083deb3169f9c3a /cpu/example_cpu.ml
parent2392043f5e44af97a8d84d05fa02c13ece0adcb0 (diff)
downloadSystDigit-Projet-39df9f197b987e0a2c564276d5b65a97f1fb2700.tar.gz
SystDigit-Projet-39df9f197b987e0a2c564276d5b65a97f1fb2700.zip
Style corrections.
Diffstat (limited to 'cpu/example_cpu.ml')
-rw-r--r--cpu/example_cpu.ml2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/example_cpu.ml b/cpu/example_cpu.ml
index e626cae..17106b6 100644
--- a/cpu/example_cpu.ml
+++ b/cpu/example_cpu.ml
@@ -5,7 +5,7 @@ open Netlist_gen
let sumz n i =
let x, set_x = loop n in
let r = reg n x in
- let o1, o2 = Alu.nadder n i r (const "0") in
+ let o1, o2 = Alu.nadder_with_carry n i r (const "0") in
set_x o1, o2
let p =