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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-14 14:20:06 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-14 14:20:06 +0100 |
commit | da001d3b59438bd14443fa5978ae3be7e308d348 (patch) | |
tree | f7a019d174455c75830c7aeb3b60db7628829184 /cpu/alu.ml | |
parent | 2c0aa7d49f5a18d5eaad23060a4db9c364964d97 (diff) | |
parent | 930ca54aa228a340e9139def8c0e67dd5c175331 (diff) | |
download | SystDigit-Projet-da001d3b59438bd14443fa5978ae3be7e308d348.tar.gz SystDigit-Projet-da001d3b59438bd14443fa5978ae3be7e308d348.zip |
Merge branch 'jonathan'
Diffstat (limited to 'cpu/alu.ml')
-rw-r--r-- | cpu/alu.ml | 55 |
1 files changed, 21 insertions, 34 deletions
@@ -185,12 +185,12 @@ let nmulu n a b start_signal = -let rec ndivu n a b start_signal = +let rec ndivu n a b start_signal = let next_busy, set_next_busy = loop 1 in let busy = start_signal ^| (reg 1 next_busy) in - let dd, set_dd = loop n in (* dividande *) + let dd, set_dd = loop n in (* dividende *) let q , set_q = loop n in (* quotient *) let r , set_r = loop n in (* reste *) @@ -200,39 +200,26 @@ let rec ndivu n a b start_signal = bien que le calcul est terminé quand c vaut 0 *) let c , set_c = loop n in - - - - - (* On définit la concaténée des nouvelles valeurs de dd, q, r, et c *) - - let ddqrc = set_dd ( + let c = set_c ( mux start_signal - (* A chaque nouvelle étape *) - ( - - (* A l'itération i (i = 0 ... n - 1) Le bit de poids fort de [dd] - correspond au bit (n-i-1) du dividande original *) - (shiftl1 n (reg n dd)) ++ - q ++ (* Le quotient reste pour l'instant inchangé *) - ((dd ** (n-1)) ++ ((reg n r) % (0, n-2))) ++ (* On abaisse le bit (n-i-1) du dividande *) - shiftl1 n c (* on décale c *) - ) + (shiftl1 n (reg n c)) + ((const "0") ++ (rep (n-1) (const "1"))) ) in - (* Initialisation *) - ((a) ++ (zeroes n) ++ (zeroes n) ++ (rep n (const "1"))) ) - in + (* Initialisation de q et r *) + let q = mux start_signal (reg n q) (zeroes n) in + let r = mux start_signal (reg n r) (zeroes n) in - let dd = set_dd (ddqrc % (0, n-1)) in - let q' = (ddqrc % (n, 2*n-1)) in - let r' = (ddqrc % (2*n, 3*n-1)) in - let c = set_c (ddqrc % (3*n, 4*n-1)) in + (* A l'itération i (i = 0 ... n - 1) Le bit de poids fort de [dd] + correspond au bit (n-i-1) du dividende original *) + let dd = set_dd (mux start_signal (shiftl1 n (reg n dd)) a) in - + (* On abaisse le bit (n-i-1) du dividende *) + let r = (dd ** (n-1)) ++ (r % (0, n-2)) in + (* Si r >= d alors r := r - d et q(n-i-1) := 1 *) - let rq = mux (ule_n n b r') - (r' ++ (const "0") ++ ((reg n q') % (0, n-2))) - ((nsubber n r' b) ++ (const "1") ++ ((reg n q') % (0, n-2))) in + let rq = mux (ule_n n b r) + (r ++ ((const "0") ++ (q % (0, n-2)))) + ((nsubber n r b) ++ ((const "1") ++ (q % (0, n-2)))) in let r = set_r (rq % (0, n-1)) in let q = set_q (rq % (n, 2*n-1)) in @@ -243,18 +230,18 @@ let rec ndivu n a b start_signal = set_next_busy (busy ^& work_remains) ^. (not work_remains) ^& busy in - dd ^. c ^. + dd ^. c ^. q, r, finished - + -(* zeroes (n-3) ++ const "110", zeroes (n-3) ++ const "110", +(* zeroes (n-3) ++ const "110", zeroes (n-3) ++ const "110", start_signal *) (* TODO : unsigned division, returns quotient and remainder *) let rec nmul n a b start_signal = - zeroes (n-3) ++ const "101", zeroes (n-3) ++ const "101", start_signal + zeroes (n-3) ++ const "101", zeroes (n-3) ++ const "101", start_signal (* TODO : signed multiplication ; returns low part and high part *) |