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| author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-08 10:38:27 +0100 |
|---|---|---|
| committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2014-01-08 10:38:27 +0100 |
| commit | 5738e470e8c2158d2b6a966d86100bb33628b90a (patch) | |
| tree | 3d6c8f9e679d4ed4a98063a6c522f0e286b33322 | |
| parent | 479a6b1ef7f435e12327a8468b8e33d096b56ce2 (diff) | |
| download | SystDigit-Projet-5738e470e8c2158d2b6a966d86100bb33628b90a.tar.gz SystDigit-Projet-5738e470e8c2158d2b6a966d86100bb33628b90a.zip | |
Add assembler ; much testing to do.
| -rw-r--r-- | cpu/Makefile | 2 | ||||
| -rw-r--r-- | sched/Makefile | 2 | ||||
| -rw-r--r-- | sched/_tags | 3 |
3 files changed, 4 insertions, 3 deletions
diff --git a/cpu/Makefile b/cpu/Makefile index 898b007..5efa691 100644 --- a/cpu/Makefile +++ b/cpu/Makefile @@ -8,7 +8,7 @@ SIM=../csim/csim MON=../monitor/mon all: _build/cpu_opt.dumb - $(MON) $(SIM) -rom ROM0 prog_rom0.rom $< + $(MON) $(SIM) -rom ROM0 prog_test1.rom $< %.sim: _build/%.dumb $(SIM) -n 12 $< diff --git a/sched/Makefile b/sched/Makefile index 4d36b96..35d6ddc 100644 --- a/sched/Makefile +++ b/sched/Makefile @@ -3,7 +3,7 @@ IN=graph.ml main.ml netlist_ast.ml netlist_dumb.ml netlist_lexer.mll netlist.ml all: sched sched: $(IN) - ocamlbuild -libs unix main.native + ocamlbuild main.native mv main.native sched clean: diff --git a/sched/_tags b/sched/_tags index 503ce62..007e22c 100644 --- a/sched/_tags +++ b/sched/_tags @@ -1,3 +1,4 @@ true: use_menhir <*.ml>: debug -<*.byte>: use_unix, debug
\ No newline at end of file +<*.byte>: use_unix, debug +<*.native>: use_unix |