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authorAlex AUVOLAT <alex.auvolat@ens.fr>2014-01-14 14:20:57 +0100
committerAlex AUVOLAT <alex.auvolat@ens.fr>2014-01-14 14:20:57 +0100
commit4447c0027a3009eb280e2e08ca6b9753d265938e (patch)
tree39c3cb716381bb6c5b723a6f5f785bdb3a46adf0
parentda001d3b59438bd14443fa5978ae3be7e308d348 (diff)
downloadSystDigit-Projet-4447c0027a3009eb280e2e08ca6b9753d265938e.tar.gz
SystDigit-Projet-4447c0027a3009eb280e2e08ca6b9753d265938e.zip
Division now works :)
-rw-r--r--cpu/cpu.ml2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/cpu.ml b/cpu/cpu.ml
index 78caa30..9b5eed0 100644
--- a/cpu/cpu.ml
+++ b/cpu/cpu.ml
@@ -163,7 +163,7 @@ let rl, rh, i, ex, exf, pc =
let wr = mux instr_alu_finished wr i_r in
let rwd = mux instr_alu_finished rwd alu_d1 in
let wr = mux instr_alu_store_2 wr (const "101") in
- let rwd = mux instr_alu_store_2 rwd alu_d2 in
+ let rwd = mux instr_alu_store_2 rwd (reg 16 alu_d2) in
let exec_finished = mux instr_alu exec_finished
(mux double_instr_alu instr_alu_finished instr_alu_store_2) in