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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-12-19 18:30:45 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-12-19 18:30:45 +0100 |
commit | 19d450830f848c9d88d61c381c3bafde560f78bb (patch) | |
tree | 978608fca2655d07db9af768afbee24011018579 /.gitignore | |
parent | 1e5b58007da3be94755b017004cd5fe484ccbed7 (diff) | |
download | SystDigit-Projet-19d450830f848c9d88d61c381c3bafde560f78bb.tar.gz SystDigit-Projet-19d450830f848c9d88d61c381c3bafde560f78bb.zip |
Suggestion de plan pour un micro-RISC 16 bit moisi (mais rigolo).
Diffstat (limited to '.gitignore')
-rw-r--r-- | .gitignore | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -3,9 +3,9 @@ */*.byte csim/csim *.o -tests/*.net -tests/*.snet -tests/*.dumb -rapport_simulateur.ps +*.ps +*/*.net +*/*.snet +*/*.dumb rapport_simulateur.pdf *.tm~ |