From cebd07b64f1f537c5ecf00ec21ff4b7c4032f0a3 Mon Sep 17 00:00:00 2001 From: Alex AUVOLAT Date: Mon, 4 Nov 2013 22:05:57 +0100 Subject: Added stub C simulator (defined dumb-down syntax for netlists). --- sched/test/clock_div.dumb | 11 +++++++++ sched/test/clock_div.mj | 4 ++++ sched/test/clock_div.net | 9 ++++++++ sched/test/clock_div_sch.net | 9 ++++++++ sched/test/cm2.dumb | 9 ++++++++ sched/test/cm2.mj | 4 ++++ sched/test/cm2.net | 9 ++++++++ sched/test/cm2_sch.net | 9 ++++++++ sched/test/fulladder.dumb | 20 ++++++++++++++++ sched/test/fulladder.mj | 4 ++++ sched/test/fulladder.net | 12 ++++++++++ sched/test/fulladder_sch.net | 12 ++++++++++ sched/test/nadder.dumb | 27 ++++++++++++++++++++++ sched/test/nadder.mj | 19 +++++++++++++++ sched/test/nadder.net | 17 ++++++++++++++ sched/test/nadder_sch.net | 17 ++++++++++++++ sched/test/ram.dumb | 55 ++++++++++++++++++++++++++++++++++++++++++++ sched/test/ram.mj | 15 ++++++++++++ sched/test/ram.net | 32 ++++++++++++++++++++++++++ sched/test/ram_sch.net | 32 ++++++++++++++++++++++++++ 20 files changed, 326 insertions(+) create mode 100644 sched/test/clock_div.dumb create mode 100644 sched/test/clock_div.mj create mode 100644 sched/test/clock_div.net create mode 100644 sched/test/clock_div_sch.net create mode 100644 sched/test/cm2.dumb create mode 100644 sched/test/cm2.mj create mode 100644 sched/test/cm2.net create mode 100644 sched/test/cm2_sch.net create mode 100644 sched/test/fulladder.dumb create mode 100644 sched/test/fulladder.mj create mode 100644 sched/test/fulladder.net create mode 100644 sched/test/fulladder_sch.net create mode 100644 sched/test/nadder.dumb create mode 100644 sched/test/nadder.mj create mode 100644 sched/test/nadder.net create mode 100644 sched/test/nadder_sch.net create mode 100644 sched/test/ram.dumb create mode 100644 sched/test/ram.mj create mode 100644 sched/test/ram.net create mode 100644 sched/test/ram_sch.net (limited to 'sched/test') diff --git a/sched/test/clock_div.dumb b/sched/test/clock_div.dumb new file mode 100644 index 0000000..bcb07d0 --- /dev/null +++ b/sched/test/clock_div.dumb @@ -0,0 +1,11 @@ +3 +1 _l_2 +1 c +1 o +0 +1 2 +3 +0 1 2 +2 1 1 +1 2 0 + diff --git a/sched/test/clock_div.mj b/sched/test/clock_div.mj new file mode 100644 index 0000000..ad1e919 --- /dev/null +++ b/sched/test/clock_div.mj @@ -0,0 +1,4 @@ +main() = (o) where + o = reg(c); + c = not (reg (o)) +end where \ No newline at end of file diff --git a/sched/test/clock_div.net b/sched/test/clock_div.net new file mode 100644 index 0000000..9a17fc7 --- /dev/null +++ b/sched/test/clock_div.net @@ -0,0 +1,9 @@ +INPUT +OUTPUT o +VAR + _l_2, c, o +IN +c = NOT _l_2 +o = REG c +_l_2 = REG o + diff --git a/sched/test/clock_div_sch.net b/sched/test/clock_div_sch.net new file mode 100644 index 0000000..0ae5cd9 --- /dev/null +++ b/sched/test/clock_div_sch.net @@ -0,0 +1,9 @@ +INPUT +OUTPUT o +VAR + _l_2, c, o +IN +_l_2 = REG o +o = REG c +c = NOT _l_2 + diff --git a/sched/test/cm2.dumb b/sched/test/cm2.dumb new file mode 100644 index 0000000..632c6ea --- /dev/null +++ b/sched/test/cm2.dumb @@ -0,0 +1,9 @@ +4 +1 _l_1 +1 r +1 s +1 x +1 3 +2 2 1 +3 + diff --git a/sched/test/cm2.mj b/sched/test/cm2.mj new file mode 100644 index 0000000..8863bf1 --- /dev/null +++ b/sched/test/cm2.mj @@ -0,0 +1,4 @@ +main(x) = (s, r) where + s = reg (x xor s); + r = x and s +end where \ No newline at end of file diff --git a/sched/test/cm2.net b/sched/test/cm2.net new file mode 100644 index 0000000..e296b96 --- /dev/null +++ b/sched/test/cm2.net @@ -0,0 +1,9 @@ +INPUT x +OUTPUT s, r +VAR + _l_1, r, s, x +IN +r = AND x s +s = REG _l_1 +_l_1 = XOR x s + diff --git a/sched/test/cm2_sch.net b/sched/test/cm2_sch.net new file mode 100644 index 0000000..e9900d5 --- /dev/null +++ b/sched/test/cm2_sch.net @@ -0,0 +1,9 @@ +INPUT x +OUTPUT s, r +VAR + _l_1, r, s, x +IN +s = REG _l_1 +_l_1 = XOR x s +r = AND x s + diff --git a/sched/test/fulladder.dumb b/sched/test/fulladder.dumb new file mode 100644 index 0000000..480d04d --- /dev/null +++ b/sched/test/fulladder.dumb @@ -0,0 +1,20 @@ +9 +1 _l_1 +1 _l_3 +1 _l_4 +1 _l_5 +1 a +1 b +1 c +1 r +1 s +3 4 5 6 +2 8 7 +6 +2 3 1 4 5 +3 3 2 2 6 +1 3 2 4 5 +0 3 1 4 5 +8 3 1 0 6 +7 3 0 1 3 + diff --git a/sched/test/fulladder.mj b/sched/test/fulladder.mj new file mode 100644 index 0000000..c4b6b0e --- /dev/null +++ b/sched/test/fulladder.mj @@ -0,0 +1,4 @@ +main(a,b,c) = (s, r) where + s = (a xor b) xor c; + r = (a and b) or ((a xor b) and c); +end where \ No newline at end of file diff --git a/sched/test/fulladder.net b/sched/test/fulladder.net new file mode 100644 index 0000000..b2271c2 --- /dev/null +++ b/sched/test/fulladder.net @@ -0,0 +1,12 @@ +INPUT a, b, c +OUTPUT s, r +VAR + _l_1, _l_3, _l_4, _l_5, a, b, c, r, s +IN +r = OR _l_3 _l_5 +s = XOR _l_1 c +_l_1 = XOR a b +_l_3 = AND a b +_l_4 = XOR a b +_l_5 = AND _l_4 c + diff --git a/sched/test/fulladder_sch.net b/sched/test/fulladder_sch.net new file mode 100644 index 0000000..96fc154 --- /dev/null +++ b/sched/test/fulladder_sch.net @@ -0,0 +1,12 @@ +INPUT a, b, c +OUTPUT s, r +VAR + _l_1, _l_3, _l_4, _l_5, a, b, c, r, s +IN +_l_4 = XOR a b +_l_5 = AND _l_4 c +_l_3 = AND a b +_l_1 = XOR a b +s = XOR _l_1 c +r = OR _l_3 _l_5 + diff --git a/sched/test/nadder.dumb b/sched/test/nadder.dumb new file mode 100644 index 0000000..469984d --- /dev/null +++ b/sched/test/nadder.dumb @@ -0,0 +1,27 @@ +12 +1 _l_10_50 +1 _l_11_49 +1 _l_16_22 +1 _l_17_21 +1 _l_7_52 +1 _l_9_51 +1 a +1 b +1 c +1 c_n1_27 +1 o +1 s_n_26 +2 6 7 +2 10 8 +10 +3 9 0 7 +2 9 0 6 +9 0 $0 +0 3 1 2 3 +1 3 2 0 9 +5 3 2 2 3 +4 3 1 2 3 +11 3 1 4 9 +8 3 0 5 1 +10 0 11 + diff --git a/sched/test/nadder.mj b/sched/test/nadder.mj new file mode 100644 index 0000000..0c95386 --- /dev/null +++ b/sched/test/nadder.mj @@ -0,0 +1,19 @@ +fulladder(a,b,c) = (s, r) where + s = (a ^ b) ^ c; + r = (a & b) + ((a ^ b) & c); +end where + +adder(a:[n], b:[n], c_in) = (o:[n], c_out) where + if n = 0 then + o = []; + c_out = 0 + else + (s_n1, c_n1) = adder(a[1..], b[1..], c_in); + (s_n, c_out) = fulladder(a[0], b[0], c_n1); + o = s_n . s_n1 + end if +end where + +main(a, b) = (o, c) where + (o, c) = adder<1>(a,b,0) +end where \ No newline at end of file diff --git a/sched/test/nadder.net b/sched/test/nadder.net new file mode 100644 index 0000000..bf87051 --- /dev/null +++ b/sched/test/nadder.net @@ -0,0 +1,17 @@ +INPUT a, b +OUTPUT o, c +VAR + _l_10_50, _l_11_49, _l_16_22, _l_17_21, _l_7_52, _l_9_51, a, b, c, + c_n1_27, o, s_n_26 +IN +o = s_n_26 +c = OR _l_9_51 _l_11_49 +s_n_26 = XOR _l_7_52 c_n1_27 +_l_7_52 = XOR _l_16_22 _l_17_21 +_l_9_51 = AND _l_16_22 _l_17_21 +_l_10_50 = XOR _l_16_22 _l_17_21 +_l_11_49 = AND _l_10_50 c_n1_27 +c_n1_27 = 0 +_l_16_22 = SELECT 0 a +_l_17_21 = SELECT 0 b + diff --git a/sched/test/nadder_sch.net b/sched/test/nadder_sch.net new file mode 100644 index 0000000..5602eb4 --- /dev/null +++ b/sched/test/nadder_sch.net @@ -0,0 +1,17 @@ +INPUT a, b +OUTPUT o, c +VAR + _l_10_50, _l_11_49, _l_16_22, _l_17_21, _l_7_52, _l_9_51, a, b, c, + c_n1_27, o, s_n_26 +IN +_l_17_21 = SELECT 0 b +_l_16_22 = SELECT 0 a +c_n1_27 = 0 +_l_10_50 = XOR _l_16_22 _l_17_21 +_l_11_49 = AND _l_10_50 c_n1_27 +_l_9_51 = AND _l_16_22 _l_17_21 +_l_7_52 = XOR _l_16_22 _l_17_21 +s_n_26 = XOR _l_7_52 c_n1_27 +c = OR _l_9_51 _l_11_49 +o = s_n_26 + diff --git a/sched/test/ram.dumb b/sched/test/ram.dumb new file mode 100644 index 0000000..74cf168 --- /dev/null +++ b/sched/test/ram.dumb @@ -0,0 +1,55 @@ +27 +1 _l_10_22 +1 _l_10_35 +1 _l_10_48 +1 _l_10_61 +1 _l_11_21 +1 _l_11_34 +1 _l_11_47 +1 _l_11_60 +3 _l_12_20 +2 _l_12_33 +1 _l_12_46 +3 _l_13_19 +2 _l_13_32 +1 _l_13_45 +3 _l_14_18 +2 _l_14_31 +1 _l_14_44 +4 _l_16 +1 _l_9_23 +1 _l_9_36 +1 _l_9_49 +1 _l_9_62 +4 c +4 o +2 ra +2 wa +1 we +4 24 26 25 22 +1 23 +23 +11 8 1 3 22 +12 8 1 2 11 +13 8 1 1 12 +3 9 0 13 +23 6 2 4 24 26 25 17 +8 8 1 3 23 +9 8 1 2 8 +10 8 1 1 9 +21 9 0 10 +7 3 2 21 3 +16 0 7 +2 9 0 12 +20 9 0 9 +6 3 2 20 2 +15 7 6 16 +1 9 0 11 +19 9 0 8 +5 3 2 19 1 +14 7 5 15 +0 9 0 22 +18 9 0 23 +4 3 2 18 0 +17 7 4 14 + diff --git a/sched/test/ram.mj b/sched/test/ram.mj new file mode 100644 index 0000000..7c4d1ed --- /dev/null +++ b/sched/test/ram.mj @@ -0,0 +1,15 @@ +const addr = 2 +const word = 4 + +or_n(a:[n],b:[n]) = (o:[n]) where + if n = 0 then + o = [] + else + o = (a[0] and b[0]).(or_n(a[1..], b[1..])) + end if +end where + +main(ra:[addr], we, wa:[addr], c:[word]) = (o:[word]) where + o = ram(ra, we, wa, or_n(o, c)) +end where + diff --git a/sched/test/ram.net b/sched/test/ram.net new file mode 100644 index 0000000..ee4570a --- /dev/null +++ b/sched/test/ram.net @@ -0,0 +1,32 @@ +INPUT ra, we, wa, c +OUTPUT o +VAR + _l_10_22, _l_10_35, _l_10_48, _l_10_61, _l_11_21, _l_11_34, _l_11_47, + _l_11_60, _l_12_20 : 3, _l_12_33 : 2, _l_12_46 : 1, _l_13_19 : 3, _l_13_32 : 2, + _l_13_45 : 1, _l_14_18 : 3, _l_14_31 : 2, _l_14_44 : 1, _l_16 : 4, + _l_9_23, _l_9_36, _l_9_49, _l_9_62, c : 4, o : 4, ra : 2, wa : 2, we +IN +o = RAM 2 4 ra we wa _l_16 +_l_16 = CONCAT _l_11_21 _l_14_18 +_l_9_23 = SELECT 0 o +_l_10_22 = SELECT 0 c +_l_11_21 = AND _l_9_23 _l_10_22 +_l_12_20 = SLICE 1 3 o +_l_13_19 = SLICE 1 3 c +_l_14_18 = CONCAT _l_11_34 _l_14_31 +_l_9_36 = SELECT 0 _l_12_20 +_l_10_35 = SELECT 0 _l_13_19 +_l_11_34 = AND _l_9_36 _l_10_35 +_l_12_33 = SLICE 1 2 _l_12_20 +_l_13_32 = SLICE 1 2 _l_13_19 +_l_14_31 = CONCAT _l_11_47 _l_14_44 +_l_9_49 = SELECT 0 _l_12_33 +_l_10_48 = SELECT 0 _l_13_32 +_l_11_47 = AND _l_9_49 _l_10_48 +_l_12_46 = SLICE 1 1 _l_12_33 +_l_13_45 = SLICE 1 1 _l_13_32 +_l_14_44 = _l_11_60 +_l_9_62 = SELECT 0 _l_12_46 +_l_10_61 = SELECT 0 _l_13_45 +_l_11_60 = AND _l_9_62 _l_10_61 + diff --git a/sched/test/ram_sch.net b/sched/test/ram_sch.net new file mode 100644 index 0000000..56dda0e --- /dev/null +++ b/sched/test/ram_sch.net @@ -0,0 +1,32 @@ +INPUT ra, we, wa, c +OUTPUT o +VAR + _l_10_22, _l_10_35, _l_10_48, _l_10_61, _l_11_21, _l_11_34, _l_11_47, + _l_11_60, _l_12_20 : 3, _l_12_33 : 2, _l_12_46 : 1, _l_13_19 : 3, _l_13_32 : 2, + _l_13_45 : 1, _l_14_18 : 3, _l_14_31 : 2, _l_14_44 : 1, _l_16 : 4, + _l_9_23, _l_9_36, _l_9_49, _l_9_62, c : 4, o : 4, ra : 2, wa : 2, we +IN +_l_13_19 = SLICE 1 3 c +_l_13_32 = SLICE 1 2 _l_13_19 +_l_13_45 = SLICE 1 1 _l_13_32 +_l_10_61 = SELECT 0 _l_13_45 +o = RAM 2 4 ra we wa _l_16 +_l_12_20 = SLICE 1 3 o +_l_12_33 = SLICE 1 2 _l_12_20 +_l_12_46 = SLICE 1 1 _l_12_33 +_l_9_62 = SELECT 0 _l_12_46 +_l_11_60 = AND _l_9_62 _l_10_61 +_l_14_44 = _l_11_60 +_l_10_48 = SELECT 0 _l_13_32 +_l_9_49 = SELECT 0 _l_12_33 +_l_11_47 = AND _l_9_49 _l_10_48 +_l_14_31 = CONCAT _l_11_47 _l_14_44 +_l_10_35 = SELECT 0 _l_13_19 +_l_9_36 = SELECT 0 _l_12_20 +_l_11_34 = AND _l_9_36 _l_10_35 +_l_14_18 = CONCAT _l_11_34 _l_14_31 +_l_10_22 = SELECT 0 c +_l_9_23 = SELECT 0 o +_l_11_21 = AND _l_9_23 _l_10_22 +_l_16 = CONCAT _l_11_21 _l_14_18 + -- cgit v1.2.3