From 94e88e887cf2ee4c6b445924d26e134a90bcbd50 Mon Sep 17 00:00:00 2001 From: Alex AUVOLAT Date: Tue, 5 Nov 2013 10:18:00 +0100 Subject: Reorganized folders. --- camlsim/test/clock_div_sch.net | 9 --------- camlsim/test/cm2_sch.net | 9 --------- camlsim/test/fulladder_sch.net | 12 ------------ camlsim/test/nadder_sch.net | 17 ----------------- camlsim/test/ram_sch.net | 32 -------------------------------- 5 files changed, 79 deletions(-) delete mode 100644 camlsim/test/clock_div_sch.net delete mode 100644 camlsim/test/cm2_sch.net delete mode 100644 camlsim/test/fulladder_sch.net delete mode 100644 camlsim/test/nadder_sch.net delete mode 100644 camlsim/test/ram_sch.net (limited to 'camlsim') diff --git a/camlsim/test/clock_div_sch.net b/camlsim/test/clock_div_sch.net deleted file mode 100644 index 0ae5cd9..0000000 --- a/camlsim/test/clock_div_sch.net +++ /dev/null @@ -1,9 +0,0 @@ -INPUT -OUTPUT o -VAR - _l_2, c, o -IN -_l_2 = REG o -o = REG c -c = NOT _l_2 - diff --git a/camlsim/test/cm2_sch.net b/camlsim/test/cm2_sch.net deleted file mode 100644 index e9900d5..0000000 --- a/camlsim/test/cm2_sch.net +++ /dev/null @@ -1,9 +0,0 @@ -INPUT x -OUTPUT s, r -VAR - _l_1, r, s, x -IN -s = REG _l_1 -_l_1 = XOR x s -r = AND x s - diff --git a/camlsim/test/fulladder_sch.net b/camlsim/test/fulladder_sch.net deleted file mode 100644 index 96fc154..0000000 --- a/camlsim/test/fulladder_sch.net +++ /dev/null @@ -1,12 +0,0 @@ -INPUT a, b, c -OUTPUT s, r -VAR - _l_1, _l_3, _l_4, _l_5, a, b, c, r, s -IN -_l_4 = XOR a b -_l_5 = AND _l_4 c -_l_3 = AND a b -_l_1 = XOR a b -s = XOR _l_1 c -r = OR _l_3 _l_5 - diff --git a/camlsim/test/nadder_sch.net b/camlsim/test/nadder_sch.net deleted file mode 100644 index 5602eb4..0000000 --- a/camlsim/test/nadder_sch.net +++ /dev/null @@ -1,17 +0,0 @@ -INPUT a, b -OUTPUT o, c -VAR - _l_10_50, _l_11_49, _l_16_22, _l_17_21, _l_7_52, _l_9_51, a, b, c, - c_n1_27, o, s_n_26 -IN -_l_17_21 = SELECT 0 b -_l_16_22 = SELECT 0 a -c_n1_27 = 0 -_l_10_50 = XOR _l_16_22 _l_17_21 -_l_11_49 = AND _l_10_50 c_n1_27 -_l_9_51 = AND _l_16_22 _l_17_21 -_l_7_52 = XOR _l_16_22 _l_17_21 -s_n_26 = XOR _l_7_52 c_n1_27 -c = OR _l_9_51 _l_11_49 -o = s_n_26 - diff --git a/camlsim/test/ram_sch.net b/camlsim/test/ram_sch.net deleted file mode 100644 index 56dda0e..0000000 --- a/camlsim/test/ram_sch.net +++ /dev/null @@ -1,32 +0,0 @@ -INPUT ra, we, wa, c -OUTPUT o -VAR - _l_10_22, _l_10_35, _l_10_48, _l_10_61, _l_11_21, _l_11_34, _l_11_47, - _l_11_60, _l_12_20 : 3, _l_12_33 : 2, _l_12_46 : 1, _l_13_19 : 3, _l_13_32 : 2, - _l_13_45 : 1, _l_14_18 : 3, _l_14_31 : 2, _l_14_44 : 1, _l_16 : 4, - _l_9_23, _l_9_36, _l_9_49, _l_9_62, c : 4, o : 4, ra : 2, wa : 2, we -IN -_l_13_19 = SLICE 1 3 c -_l_13_32 = SLICE 1 2 _l_13_19 -_l_13_45 = SLICE 1 1 _l_13_32 -_l_10_61 = SELECT 0 _l_13_45 -o = RAM 2 4 ra we wa _l_16 -_l_12_20 = SLICE 1 3 o -_l_12_33 = SLICE 1 2 _l_12_20 -_l_12_46 = SLICE 1 1 _l_12_33 -_l_9_62 = SELECT 0 _l_12_46 -_l_11_60 = AND _l_9_62 _l_10_61 -_l_14_44 = _l_11_60 -_l_10_48 = SELECT 0 _l_13_32 -_l_9_49 = SELECT 0 _l_12_33 -_l_11_47 = AND _l_9_49 _l_10_48 -_l_14_31 = CONCAT _l_11_47 _l_14_44 -_l_10_35 = SELECT 0 _l_13_19 -_l_9_36 = SELECT 0 _l_12_20 -_l_11_34 = AND _l_9_36 _l_10_35 -_l_14_18 = CONCAT _l_11_34 _l_14_31 -_l_10_22 = SELECT 0 c -_l_9_23 = SELECT 0 o -_l_11_21 = AND _l_9_23 _l_10_22 -_l_16 = CONCAT _l_11_21 _l_14_18 - -- cgit v1.2.3