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-rw-r--r--cpu/cpu.ml18
-rw-r--r--monitor/disp.c2
-rw-r--r--sched/scheduler.ml18
3 files changed, 17 insertions, 21 deletions
diff --git a/cpu/cpu.ml b/cpu/cpu.ml
index 0cdc805..541e364 100644
--- a/cpu/cpu.ml
+++ b/cpu/cpu.ml
@@ -209,20 +209,20 @@ let rl, rh, i, ex, exf, pc =
let instr_lwx = instr_lswx ^& (not (i_i ** 0)) in
let lswx_d = mux instr_lswr (sign_extend 5 16 i_kd) v_rb in
- let lswx_addr_lo = reg 16 (nadder 16 v_ra lswx_d) in
- let lswx_addr_hi = let a, b = nadder_with_carry 16 v_ra lswx_d (const "1") in b ^. reg 16 a in
+ let lswx_addr_lo = nadder 16 v_ra lswx_d in
+ let lswx_addr_hi = let a, b = nadder_with_carry 16 v_ra lswx_d (const "1") in b ^. a in
let lwx_load_lo = reg 1 (exec ^& instr_lwx) in
let lwx_load_hi = reg 1 lwx_load_lo in
- let ra = mux lwx_load_lo ra lswx_addr_lo in
+ let ra = mux lwx_load_lo ra (reg 16 lswx_addr_lo) in
let lwx_lo = reg 8 (mux lwx_load_lo (zeroes 8) ram_read) in
- let ra = mux lwx_load_hi ra lswx_addr_hi in
+ let ra = mux lwx_load_hi ra (reg 16 lswx_addr_hi) in
let lwx_hi = mux lwx_load_hi (zeroes 8) ram_read in
let wr = mux lwx_load_hi wr i_r in
let rwd = mux lwx_load_hi rwd (lwx_lo ++ lwx_hi) in
let exec_finished = mux instr_lwx exec_finished lwx_load_hi in
- let swx_save_lo = reg 1 (exec ^& instr_swx) in
+ let swx_save_lo = exec ^& instr_swx in
let swx_save_hi = reg 1 swx_save_lo in
let we = we ^| swx_save_lo in
let wa = mux swx_save_lo wa lswx_addr_lo in
@@ -240,19 +240,19 @@ let rl, rh, i, ex, exf, pc =
let instr_lbx = instr_lsbx ^& (not (i_i ** 0)) in
let lsbx_d = mux instr_lsbr (sign_extend 5 16 i_kd) v_rb in
- let lsbx_addr = reg 16 (nadder 16 v_ra lsbx_d) in
+ let lsbx_addr = nadder 16 v_ra lsbx_d in
let lbx_load = reg 1 (exec ^& instr_lbx) in
- let ra = mux lbx_load ra lsbx_addr in
+ let ra = mux lbx_load ra (reg 16 lsbx_addr) in
let wr = mux lbx_load wr i_r in
let rwd = mux lbx_load rwd (ram_read ++ (zeroes 8)) in
let exec_finished = mux instr_lbx exec_finished lbx_load in
- let sbx_save = reg 1 (exec ^& instr_sbx) in
+ let sbx_save = exec ^& instr_sbx in
let we = we ^| sbx_save in
let wa = mux sbx_save wa lsbx_addr in
let d = mux sbx_save d (v_r % (0, 7)) in
- let exec_finished = mux instr_sbx exec_finished sbx_save in
+ (* no mux exec_finished, sb runs immediately *)
(* instruction : lil/lilz/liu/liuz *)
let instr_lixx = eq_c 3 (i_i % (2, 4))0b110 in
diff --git a/monitor/disp.c b/monitor/disp.c
index 7b11bef..992c712 100644
--- a/monitor/disp.c
+++ b/monitor/disp.c
@@ -24,7 +24,7 @@ void disp_init() {
noecho();
nonl();
- const int status_win_width = COLS / 2;
+ const int status_win_width = COLS - 58;
wpstatus = newwin(LINES - 4, status_win_width, 1, 1);
wpstatus2 = newwin(10, COLS - status_win_width - 3, 1, status_win_width + 2);
wpoutput = newwin(LINES - 13, COLS - status_win_width - 3, 11, status_win_width + 2);
diff --git a/sched/scheduler.ml b/sched/scheduler.ml
index 611aab4..d7c5596 100644
--- a/sched/scheduler.ml
+++ b/sched/scheduler.ml
@@ -4,11 +4,11 @@ module Smap = Map.Make(String)
exception Combinational_cycle
+let add_arg x l = match x with
+ | Avar(f) -> f::l
+ | Aconst(_) -> l
+
let read_exp eq =
- let add_arg x l = match x with
- | Avar(f) -> f::l
- | Aconst(_) -> l
- in
let aux = function
| Earg(x) -> add_arg x []
| Ereg(i) -> []
@@ -16,7 +16,7 @@ let read_exp eq =
| Ebinop(_, x, y) -> add_arg x (add_arg y [])
| Emux(a, b, c) -> add_arg a (add_arg b (add_arg c []))
| Erom(_, _, a) -> add_arg a []
- | Eram(_, _, a, b, c, d) -> []
+ | Eram(_, _, ra, wa, we, d) -> add_arg ra []
| Econcat(u, v) -> add_arg u (add_arg v [])
| Eslice(_, _, a) -> add_arg a []
| Eselect(_, a) -> add_arg a []
@@ -24,18 +24,14 @@ let read_exp eq =
aux eq
let read_exp_all eq =
- let add_arg x l = match x with
- | Avar(f) -> f::l
- | Aconst(_) -> l
- in
let aux = function
| Earg(x) -> add_arg x []
| Ereg(i) -> [i]
| Enot(x) -> add_arg x []
| Ebinop(_, x, y) -> add_arg x (add_arg y [])
| Emux(a, b, c) -> add_arg a (add_arg b (add_arg c []))
- | Erom(_, _, a) -> add_arg a []
- | Eram(_, _, a, b, c, d) -> add_arg a (add_arg b (add_arg c (add_arg d [])))
+ | Erom(_, _, ra) -> add_arg ra []
+ | Eram(_, _, ra, wa, we, d) -> add_arg ra (add_arg wa (add_arg we (add_arg d [])))
| Econcat(u, v) -> add_arg u (add_arg v [])
| Eslice(_, _, a) -> add_arg a []
| Eselect(_, a) -> add_arg a []