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author | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-11-15 13:53:43 +0100 |
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committer | Alex AUVOLAT <alex.auvolat@ens.fr> | 2013-11-15 13:53:43 +0100 |
commit | c6777aae2467194d63db245b8d5c9cdbab1e0f66 (patch) | |
tree | 7ebe87a151c7e9ca597eb04bb897cc0d0d5e964e /README | |
parent | fc00f29076aa8171dd238d1d70607ee6abbbba7a (diff) | |
download | SystDigit-Projet-c6777aae2467194d63db245b8d5c9cdbab1e0f66.tar.gz SystDigit-Projet-c6777aae2467194d63db245b8d5c9cdbab1e0f66.zip |
Added a TODO, changed a few comments.
Diffstat (limited to 'README')
-rw-r--r-- | README | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -249,6 +249,7 @@ TODO - More advanced commands for the simulator (cf Jonathan's simulator) - RAM reads give result immediately +- Optimisation : SELECT/SLICE a variable which is a CONCAT NEXT STEPS ---------- |